News
Chip Industry Week In Review
2+ day, 18+ hour ago (483+ words) Taiwan, Europe packaging buildout; 2nm ramps; quantum big $; 2 new university hubs; agent honeypots; Samsung strike averted; extreme environment chip design; quantum-dot qubit device fabricated w/high-NA EUV; EU flagship power electronics project; CNTs. Find newsletters from all five Semiconductor Engineering channels…...
Large-scale, SRAM-based LLM Inference Deployment (Groq)
3+ day, 9+ hour ago (272+ words) A new technical paper, "SHIP: SRAM-Based Huge Inference Pipelines for Fast LLM Serving," was published by researchers at Nvidia, with work done while at Groq. Abstract "The proliferation of large language models (LLMs) demands inference systems with both low latency…...
Cost-Effective High-Performance Flip Chip Micro Lead Frame (fc MLF) Package Introduction
3+ day, 18+ hour ago (293+ words) Enabling electrical and thermal performance enhancements while maintaining the manufacturing efficiency and scalability of the MLF leadframe technology. The post Cost-Effective High-Performance Flip Chip Micro Lead Frame (fc MLF) Package Introduction appeared first on Semiconductor Engineering. Abstract "The demand for…...
Process Variation In The Era Of Scaling: Improving Uniformity With Dummy Fill
3+ day, 18+ hour ago (443+ words) Pattern-dependent variation means the same manufacturing step can produce different results, depending on what the nearby shapes look like. So why can STI recess differ even under the same recipe? The main reason is usually the'difference in the surrounding layout…...
Advancing Heterogeneous Integration Through Industry Roadmap Improvements
3+ day, 18+ hour ago (565+ words) More detailed roadmaps are needed to guide how the industry stacks, connects, powers, and cools tomorrow's chips. The post Advancing Heterogeneous Integration Through Industry Roadmap Improvements appeared first on Semiconductor Engineering....
Beyond Ideal Crystals: The Case For Scale In Atomistic Modeling
3+ day, 18+ hour ago (446+ words) Almost all computer simulations face the same trade-off: larger models can be more realistic and therefore more useful, but they also take longer to run. Engineers and scientists are therefore faced with an almost daily challenge of choosing a model…...
Mask Technology Faces A New Set Of Challenges
3+ day, 18+ hour ago (180+ words) Inspection limits, curvilinear adoption, data volumes, and high-NA EUV are converging to stress the mask ecosystem Experts at the table: Semiconductor Engineering sat down to discuss mask technology challenges with Aki Fujimura, CEO at D2 S; Glen Scheid, operations manager at…...
With Chiplets, What Role Does Economics Play?
3+ day, 18+ hour ago (1174+ words) Costs can rise with chiplets. Will that change? Will it matter? Chiplets are notoriously expensive and finicky today, and they raise questions about how costs can be managed and reduced. If chiplets are to reach their full potential, those issues…...
Low-Temp Solders Are Suddenly Critical For Chiplets And Photonics
3+ day, 18+ hour ago (293+ words) Warpage, heat, and brittleness can cause huge reliability problems for expensive designs. Low-temperature solders based on tin-bismuth (Sn-Bi) alloys also reduce the carbon footprint. Offering a 150 "C reflow temperature " 70 "C lower than that of SAC305 solder " "a switch to low-temperature solder…...