News
Rethinking Robotics Reinforcement Learning: A Practical Humanoid Training Workflow
8+ hour, 41+ min ago (609+ words) A complete pipeline that can run on a single workstation to train a humanoid robot to walk over rough terrain. Reinforcement learning (RL) for robotics is often associated with large GPU clusters, distributed infrastructure, and x86-based development environments. Training a…...
Early HBM4 Validation Points The Way For Next Generation AI And HPC Systems
8+ hour, 36+ min ago (554+ words) First silicon alone is no longer sufficient to establish readiness for next-generation designs. The post Early HBM4 Validation Points The Way For Next Generation AI And HPC Systems appeared first on Semiconductor Engineering. As AI and high'performance computing systems continue to…...
Power Integrity Without Blind Spots: A System Level Approach To 3 D-ICs
8+ hour, 39+ min ago (673+ words) Power delivery now spans stacked dies, interposers, bridges, and packages connected by thousands of micro-bumps and TSVs. In modern multi-die architectures, power delivery is no longer confined to a single chip. Instead, it spans stacked dies, interposers, bridges, and packages…...
PCIe 8. 0: Enabling The Next Generation Of High Bandwidth Systems
8+ hour, 36+ min ago (457+ words) As data rates continue to increase, maintaining reliable links requires careful coordination between the PHY and controller layers. As compute architectures evolve to support increasingly data'intensive workloads, the role of high'speed I/O has never been more critical. Artificial intelligence,…...
A New Era For Co-Processing
8+ hour, 39+ min ago (262+ words) Processor architectures are evolving faster than ever, but they still lag the pace of AI development. Chip architects must predict what will be required tomorrow in designs today. New processor architectures are rapidly evolving thanks to changing workloads associated with…...
Fast Isn't Fast Enough: Redefining Metrics for Edge AI
8+ hour, 41+ min ago (1805+ words) Why latency guarantees, memory movement, power budgets, and rapid model deployment now matter more than raw TOPS. The post Fast Isn't Fast Enough: Redefining Metrics for Edge AI appeared first on Semiconductor Engineering. Fast Isn't Fast Enough: Redefining Metrics for…...
The Coming Breakup Between AI And The Cloud
8+ hour, 37+ min ago (952+ words) Edge intelligence is hampered not by a lack of compute, but by the waste of it. We rarely question this arrangement, but we should. As models grow larger and expectations grow sharper, the cloud is starting to look less like…...
DRAM's Whac'A'Mole Security Crisis
8+ hour, 39+ min ago (1667+ words) New refresh commands chase Rowhammer and Rowpress, but a permanent fix remains years away. Rowhammer has been a persistent DRAM issue across several memory generations, worsening as manufacturing technology has advanced. It's also been joined by a related issue called…...
Redefining AI Inference With New Silicon Architecture
8+ hour, 42+ min ago (284+ words) Validating an optimized data movement architecture that ensures arithmetic units receive a steady stream of data every cycle. AI inference is rapidly becoming the largest and most demanding segment of the AI market, but the cost of running these workloads…...
EDA And IP Numbers Up Again, But Numbers Are More Nuanced
1+ day, 2+ hour ago (251+ words) Q4 numbers reflect strengths and weaknesses in different segments. EDA and Semiconductor IP revenue grew 10. 3% in Q4 2025 to $5. 466 billion, up from $4. 955 billion in the same period in 2024, continuing the double-digit run for the tools and IP business that has been underway for…...